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THE FIRST STEP on the road to recovery is admitting you have a problem. Intel is not admitting anything, and until the end of 2006, it has a big problem. There are several factors, both technical and managerial that will make Intel relatively uncompetitive over the next two years in all areas apart from mobile parts.
Intel has officially confirmed to the INQUIRER that it won't ramp clock speeds at the expense of features. But the real question is why AMD can do both, and Intel can't.
Scales fall off Intel's Eyes
Intel said that the Pentium 4, also known as the Netburst core was all about one thing, clock speed. In a modern computer, you can either design for many instructions executed per clock (IPC) and low clock speeds, or few instructions per clock and high clock speeds. Most companies took a middle ground, balancing the two. If you cannot get high clocks or high IPC, your product probably will never see the light of day. If you can do both, you will be very rich, but no one has done this in the X86 world yet.
Years ago, when the architecture of the P4 was being developed, someone, somewhere, made the decision to prioritise clock speeds over everything else. The design goal was to deliver MHz numbers that no one could possibly match even if they wanted to. If anyone could hit this goal, it was Intel. It had the best semiconductor engineering and manufacturing capabilities of any company.
The engineers were, very likely, given impossible goals, and told to meet them. The Pentium 4 was meant to push every technical boundary there was, and push it hard. The design philosophy was meant to last from just over 1GHz to 10GHz, but not on a single core. There were at least three cores planned: the first codenamed Willamette, the current core Prescott, and a now cancelled core, Tejas. Undoubtedly there were others, such as Nehalem but they were never destined to see the light of day, and will vanish under the waves of history.
Just over a year ago, it became apparent that Intel was not meeting its internal goals. There were problems, and it did not take much digging to find them. Intel is a company based on extensive and meticulous planning and it doesn't react well to sudden changes.
Moore's Law of Diminishing Returns
The first signs of trouble started with the 90 nanometre Pentium M CPU called Dothan. In the middle of last year the roadmaps went from showing Dothan as a 21 Watts part with a 533MHz FSB (front side bus) to a 31 Watts part. Just before its initial introduction date last autumn, it reverted to a 21 Watts part, but slower, and without the 533MHz front side bus. The 533 parts are now slated to consume 27 Watts. The chip was delayed by two quarters until May this year. Intel swept the bus change under the rug, and successfully defined the chip by its cache.
The other sign of trouble was more subtle, and concerned the release schedule of the Pentium 4 variants. For the Willamette and Northwood cores, there was a clock bump about every quarter. Moving from 1.8GHz to 3.2GHz took two years and happened in around seven steps, or an average of just under one release a quarter. If you count increases in the FSB, Intel made just over one a quarter.
But things changed with the jump from 3.2GHz to 3.4GHz. Officially, that took over seven months, and there was a problem with availability. The 3.4GHz P4 was unavailable except in very small quantities until the summer of 2004, nearly a year since the last release. The 3.6GHz Pentium 4 was officially launched in late June 2004 and was not available until September of the same year. The upgrade interval went from three months to about three quarters, and 3.6GHz parts are still not exactly overflowing on the shelves.
The 3.8GHz parts are theoretically due next month and the 4.0GHz parts are now cancelled. That puts the clock growth on the Pentium 4 line at 800MHz in two years, or two speed bumps a year. If the 3.8GHz part does not come out then, that's a 20% speed increase in two years.
There are other factors that chip away at the viability of the whole Netburst concept. Semiconductor physics plays a nasty role. With each new process, the window of speeds shrinks. If you were able to get a given design to go from three to nine clock units on the older process, the newer ones only allow four to seven that window is narrowing. Each process tightens the noose a little. While there is some leeway, the ability to release a new chip at a higher clock rate is decreasing. If you add in heat, and less time to fix problems, that makes things harder.
While Moore's Law specifies transistor count, it is commonly considered to be about clock speed too. Doubling that every year and a half means 20% is only a quarter's growth. Something is desperately wrong at Intel.
Marchitecturally Challenged
So what's wrong? We think we have most of the answers, but there are undoubtedly more hidden away.
The main problems are management, competition and technical. Management is the most to blame, competition has exacerbated the problem, and a perfect storm of technical problems compounded to finish the architecture, and for the next two years, Intel's competitiveness.
Many years ago Intel made the decision to emphasise CPU clock rate over everything else. Rather than taking a balanced performance approach, and to listen to the engineers, marchitecture triumphed over engineering.
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